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SN74ABT821ANSR

SN74ABT821ANSR
Mfr. #:
SN74ABT821ANSR
Descrizione:
Flip Flops 10-Bit Bus Interface F-F W/3-State Otpt
Ciclo vitale:
Nuovo da questo produttore.
Scheda dati:
SN74ABT821ANSR Scheda dati
Consegna:
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ECAD Model:
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SN74ABT821ANSR maggiori informazioni SN74ABT821ANSR Product Details
Attributo del prodotto
Valore attributo
Produttore:
Texas Instruments
Categoria di prodotto:
Infradito
RoHS:
Y
Numero di circuiti:
1
Famiglia logica:
74AB
Tipo di logica:
Flip-Flop interfaccia bus
Polarità:
Non invertente
Tipo di ingresso:
Single-ended
Tipo di uscita:
Single-ended
Tempo di ritardo di propagazione:
6.2 ns
Corrente di uscita ad alto livello:
- 32 mA
Corrente di uscita a basso livello:
64 mA
Tensione di alimentazione - Min:
4.5 V
Tensione di alimentazione - Max:
5.5 V
Temperatura di esercizio minima:
- 40 C
Temperatura massima di esercizio:
+ 85 C
Stile di montaggio:
SMD/SMT
Pacchetto/custodia:
SO-24
Confezione:
Bobina
Funzione:
Interfaccia bus di tipo D
Altezza:
1.95 mm
Lunghezza:
15 mm
Corrente di riposo:
38 mA
Larghezza:
5.3 mm
Marca:
Texas Instruments
Numero di canali:
10
Numero di righe di input:
10
Numero di linee di uscita:
3
Tensione di alimentazione operativa:
4.5 V to 5.5 V
Tipologia di prodotto:
Infradito
Quantità confezione di fabbrica:
1
sottocategoria:
CI logici
Unità di peso:
0.010857 oz
Tags
SN74ABT821, SN74ABT82, SN74ABT8, SN74AB, SN74A, SN74, SN7
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We provide 90-360 days warranty.

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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG SNGL 24SO
***as Instruments
These 10-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the devices provide true data at the Q outputs. A buffered output-enable (OE\) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT821 is characterized for operation over the full military temperature range of -55C to 125C. The SN74ABT821A is characterized for operation from -40C to 85C.
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Disponibilità
Azione:
Available
Su ordine:
5000
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