SN74ACT7807-40FN

SN74ACT7807-40FN
Mfr. #:
SN74ACT7807-40FN
Descrizione:
FIFO 2048 x 9 synchronous FIFO memory
Ciclo vitale:
Nuovo da questo produttore.
Scheda dati:
SN74ACT7807-40FN Scheda dati
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SN74ACT7807-40FN maggiori informazioni SN74ACT7807-40FN Product Details
Attributo del prodotto
Valore attributo
Produttore:
Texas Instruments
Categoria di prodotto:
FIFO
RoHS:
Y
Larghezza bus dati:
9 bit
Direzione dell'autobus:
Unidirezionale
Dimensione della memoria:
18 kbit
Tipo di temporizzazione:
Sincrono
Organizzazione:
2 k x 9
Numero di circuiti:
2
Frequenza massima di clock:
25 MHz
Orario di accesso:
25 ns
Tensione di alimentazione - Max:
5.5 V
Tensione di alimentazione - Min:
4.5 V
Corrente di alimentazione - Max:
0.4 mA
Temperatura di esercizio minima:
0 C
Temperatura massima di esercizio:
+ 70 C
Pacchetto/custodia:
PLCC-44
Confezione:
Tubo
Altezza:
4.06 mm
Larghezza:
16.59 mm
Marca:
Texas Instruments
Stile di montaggio:
SMD/SMT
Tensione di alimentazione operativa:
5 V
Tipologia di prodotto:
FIFO
Quantità confezione di fabbrica:
1
sottocategoria:
Memoria e archiviazione dati
Unità di peso:
0.084185 oz
Tags
SN74ACT7807, SN74ACT780, SN74ACT78, SN74ACT7, SN74ACT, SN74AC, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC SYNC FIFO MEM 2048X9 44-PLCC
***as Instruments
The SN74ACT7807 is a 2048-word by 9-bit FIFO with high speed and fast access times. It processes data at rates up to 67 MHz and access times of 12 ns in a bit-parallel format. Data outputs are noninverting with respect to the data inputs. Expansion is easily accomplished in both word width and word depth. The write-clock (WRTCLK) and read-clock (RDCLK) inputs should be free running and can be asynchronous or coincident. Data is written to memory on the rising edge of WRTCLK when the write-enable (WRTEN1/DP9, WRTEN2) inputs are high and the input-ready (IR) flag output is high. Data is read from memory on the rising edge of RDCLK when the read-enable (RDEN1, RDEN2) and output-enable (OE) inputs are high and the output-ready (OR) flag output is high. The first word written to memory is clocked through to the output buffer regardless of the levels on RDEN1, RDEN2, and OE. The OR flag indicates that valid data is present on the output buffer. The FIFO can be reset asynchronous to WRTCLK and RDCLK. RESET\ must be asserted while at least four WRTCLK and four RDCLK cycles occur to clear the synchronizing registers. Resetting the FIFO initializes the IR, OR, and half-full (HF) flags low and the almost-full/almost-empty (AF/AE) flag high. The FIFO must be reset upon power up. The SN74ACT7807 is characterized for operation from 0C to 70C.
Parte # Descrizione Azione Prezzo
SN74ACT7807-40FN
DISTI # 296-4466-5-ND
IC SYNC FIFO MEM 2048X9 44-PLCC
RoHS: Compliant
Min Qty: 52
Container: Tube
Limited Supply - Call
    SN74ACT7807-40FN
    DISTI # 595-SN74ACT7807-40FN
    FIFO 2048 x 9 synchronous FIFO memory
    RoHS: Compliant
    0
      SN74ACT7807-40FNFIFO, 2KX9, 25ns, Synchronous, CMOS, PQCC44
      RoHS: Compliant
      4889
      • 1000:$12.1300
      • 500:$12.7700
      • 100:$13.3000
      • 25:$13.8700
      • 1:$14.9300
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      FIFO 2048 X 9 asynch FIFO Memory
      Disponibilità
      Azione:
      Available
      Su ordine:
      4500
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