CLVTH162373MDLREP

CLVTH162373MDLREP
Mfr. #:
CLVTH162373MDLREP
Descrizione:
Latches Mil Enhance 3.3V ABT 16B Transp D-Type
Ciclo vitale:
Nuovo da questo produttore.
Scheda dati:
CLVTH162373MDLREP Scheda dati
Consegna:
DHL FedEx Ups TNT EMS
Pagamento:
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ECAD Model:
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CLVTH162373MDLREP maggiori informazioni CLVTH162373MDLREP Product Details
Attributo del prodotto
Valore attributo
Produttore:
Texas Instruments
Categoria di prodotto:
chiavistelli
RoHS:
Y
Numero di circuiti:
2 Circuit
Tipo di logica:
Fermo trasparente tipo D
Famiglia logica:
LVT
Polarità:
Non invertente
Corrente di riposo:
5 mA
Numero di linee di uscita:
16 Line
Corrente di uscita ad alto livello:
- 12 mA
Corrente di uscita a basso livello:
32 mA
Tempo di ritardo di propagazione:
5.7 ns at 2.7 V, 5 ns at 3.3 V
Tensione di alimentazione - Max:
3.6 V
Tensione di alimentazione - Min:
2.7 V
Temperatura di esercizio minima:
- 55 C
Temperatura massima di esercizio:
+ 125 C
Pacchetto/custodia:
SSOP-48
Confezione:
Bobina
Funzione:
Trasparente
Altezza:
2.59 mm
Lunghezza:
15.88 mm
Tipo di uscita:
3-State
Serie:
SN74LVTH162373-EP
Tipo:
Tipo D
Larghezza:
7.49 mm
Marca:
Texas Instruments
Stile di montaggio:
SMD/SMT
Numero di canali:
16 Channels
Numero di righe di input:
16 Line
Tensione di alimentazione operativa:
3.3 V
Tipologia di prodotto:
chiavistelli
Tipo di ripristino:
Nessun ripristino
Quantità confezione di fabbrica:
1000
sottocategoria:
CI logici
Parte # Alias:
V62/06654-01XE
Unità di peso:
0.021175 oz
Tags
CLVTH162, CLVTH1, CLVTH, CLVT, CLV
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
Enhanced Product 3.3-V Abt 16-Bit Transparent D-Type Latches With 3-State Outputs 48-SSOP -55 to 125
***et
Latch Transparent 3-ST 16-CH D-Type 48-Pin SSOP T/R
*** Stop Electro
Bus Driver, LVT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48
***ark
Ic, 16Bit D-Latch, 3-State, Ssop-48
***as Instruments
3.3-V ABT 16-Bit Transparent D-Type Latches With 3-State Outputs 48-SSOP -40 to 85
***ical
Latch Transparent 3-ST 16-CH D-Type 48-Pin SSOP T/R
***ark
16 BIT D-LATCH, 3-STATE, SSOP-48, FULL REEL
*** Stop Electro
Bus Driver, LVT Series, 2-Func, 8-Bit, True Output, BICMOS, PDSO48
***i-Key
IC D-TYPE LATCH TRI-ST 48-SSOP
***as Instruments
3.3-V ABT 16-Bit Transparent D-Type Latches With 3-State Outputs 48-SSOP -40 to 85
***ical
Latch Transparent 3-ST 16-CH D-Type 48-Pin SSOP T/R
*** Stop Electro
Bus Driver, LVT Series, 2-Func, 8-Bit, True Output, BICMOS, PDSO48
***i-Key
IC 16BIT TRANSP D LATCH 48-SSOP
***ark
ICs, Latches Logic; Latch Type:D-Type Transparent; Output Current:64mA; Propagation Delay:2.7ns; No. of Bits:16bit; Output Type:Tristate; Supply Voltage Range:2.7V to 3.6V; Logic Case Style:SSOP; No. of Pins:48 ;RoHS Compliant: Yes
***as Instruments
2.5-V/3.3-V 16-Bit Transparent D-Type Latches With 3-State Outputs 48-SSOP -40 to 85
***ical
Latch Transparent 3-ST 16-CH D-Type 48-Pin SSOP T/R
*** Stop Electro
Bus Driver, ALVT Series, 2-Func, 8-Bit, True Output, BICMOS, PDSO48
***i-Key
IC D-TYPE LATCH TRI-ST 48-SSOP
***i-Key Marketplace
SN74ALVTH16373 2.5-V/3.3-V 16-BI
***ark
ICs, Latches Logic; Latch Type:D-Type Transparent; Output Current:32mA; Propagation Delay:3.1ns; No. of Bits:16bit; Output Type:Tristate; Supply Voltage Range:3V to 3.6V; Logic Case Style:SSOP; No. of Pins:48 ;RoHS Compliant: Yes
***ure Electronics
74LVT Series 3.3 V SMT 3-State 16-Bit Transparent D-Type Latch - SSOP-48
***et Europe
Latch Transparent 3-ST 16-CH D-Type 48-Pin SSOP T/R
***i-Key
IC 16BIT TRANSP LATCH D 48SSOP
***ponent Stockers USA
LVT SERIES DUAL 8-BIT DRIVER TRUE OUTPUT PDSO48
*** Americas
STANDARD MARKING * REEL PACK, SMD, 13'
***i-Key Marketplace
NOW NEXPERIA 74LVT16373ADL - BUS
***peria
74ALVT16823 - 18-bit bus-interface D-type flip-flop with reset and enable; 3-state
***et Europe
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 2-Element 56-Pin SSOP Tube
***i-Key
IC 18BIT BUS INTFC D F-F 56-SSOP
***ponent Stockers USA
ALVT SERIES DUAL 9-BIT DRIVER TRUE OUTPUT PDSO56
***or
BUS DRIVER, ALVT SERIES, 2 FUNC,
***et Europe
3.3V CMOS 16-Bit Transparent D-Type Latch with 3-State Outputs, 5.0V Tolerant I/O
***ical
Latch Transparent 3-ST 16-CH D-Type 48-Pin SSOP Tube
***pmh
IC OCTAL D TRANSP LATCH 20-TSSOP
***i-Key
IC TRANSP LATCH 16BIT D 48-SSOP
*** Electronic Components
Latches 16-bit Transparent D-Type Latch
***i-Key Marketplace
74LVC16373 - 3.3V CMOS 16-BIT TR
***as Instruments (TI)
The SN74LVTH162373 is a 16-bit transparent D-type latch with 3-state outputs designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
***AS INSTRU
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.
***AS INSTRU
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
***AS INSRUMENT
The outputs, which are designed to source or sink up to 12 mA, include equivalent 22- series resistors to reduce overshoot and undershoot.
***AS INSTRU
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
***OMO Electronic
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
***ASI
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
***AS INTRUMENTS
This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
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Disponibilità
Azione:
119
Su ordine:
2102
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