SN74ABT853DBRE4

SN74ABT853DBRE4
Mfr. #:
SN74ABT853DBRE4
Descrizione:
Bus Transceivers 8 to 9-Bit Parity Bus Transceivers
Ciclo vitale:
Nuovo da questo produttore.
Scheda dati:
SN74ABT853DBRE4 Scheda dati
Consegna:
DHL FedEx Ups TNT EMS
Pagamento:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
Maggiori informazioni:
SN74ABT853DBRE4 maggiori informazioni SN74ABT853DBRE4 Product Details
Attributo del prodotto
Valore attributo
Produttore:
Texas Instruments
Categoria di prodotto:
Ricetrasmettitori per autobus
RoHS:
Y
Famiglia logica:
74ABT
Livello di ingresso:
TTL
Livello di uscita:
TTL
Tipo di uscita:
3-State
Corrente di uscita ad alto livello:
- 32 mA
Corrente di uscita a basso livello:
64 mA
Tempo di ritardo di propagazione:
4.8 ns
Tensione di alimentazione - Max:
5.5 V
Tensione di alimentazione - Min:
4.5 V
Temperatura di esercizio minima:
- 40 C
Temperatura massima di esercizio:
+ 85 C
Pacchetto/custodia:
SSOP-24
Confezione:
Bobina
Funzione:
Ricetrasmettitore bus con controllo di parità
Altezza:
1.95 mm
Lunghezza:
8.2 mm
Numero di circuiti:
1
Prodotto:
BiCMOS
Corrente di riposo:
24 mA
Tecnologia:
BiCMOS
Larghezza:
5.3 mm
Marca:
Texas Instruments
Stile di montaggio:
SMD/SMT
Numero di canali:
8
Corrente di alimentazione - Max:
38 mA
Tensione di alimentazione operativa:
4.5 V to 5.5 V
Polarità:
Non invertente
Tipologia di prodotto:
Ricetrasmettitori per autobus
Quantità confezione di fabbrica:
1
sottocategoria:
CI logici
Unità di peso:
0.059966 oz
Tags
SN74ABT853DB, SN74ABT853D, SN74ABT853, SN74ABT85, SN74ABT8, SN74AB, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC TRANSCVR 8-9BIT INVERT 24SSOP
***as Instruments
The 'ABT853 8-bit to 9-bit parity transceivers are designed for communication between data buses. When data is transmitted from the A bus to the B bus, a parity bit is generated. When data is transmitted from the B bus to the A bus with its corresponding parity bit, the open-collector parity-error (ERR\) output indicates whether or not an error in the B data has occurred. The output-enable (OEA\ and OEB\) inputs can be used to disable the device so that the buses are effectively isolated. The 'ABT853 transceivers provide true data at their outputs. A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with the ERR\ flag. The parity-error output can be passed, sampled, stored, or cleared from the latch using the latch-enable (LE\) and clear (CLR\) control inputs. When both OEA\ and OEB\ are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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FIFO 512 x 18 x 2 bidir ASynch FIFO Memory
Disponibilità
Azione:
Available
Su ordine:
5000
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