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CY74FCT2574ATSOC

CY74FCT2574ATSOC
Mfr. #:
CY74FCT2574ATSOC
Descrizione:
Flip Flops Octal D-Type Rgstr with 3-State Output
Ciclo vitale:
Nuovo da questo produttore.
Scheda dati:
CY74FCT2574ATSOC Scheda dati
Consegna:
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Pagamento:
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ECAD Model:
Maggiori informazioni:
CY74FCT2574ATSOC maggiori informazioni CY74FCT2574ATSOC Product Details
Attributo del prodotto
Valore attributo
Produttore:
Texas Instruments
Categoria di prodotto:
Infradito
RoHS:
Y
Numero di circuiti:
8
Famiglia logica:
74FCT
Tipo di logica:
Registrati
Polarità:
Non invertente
Tipo di ingresso:
Single-ended
Tipo di uscita:
3-State
Tempo di ritardo di propagazione:
6.5 ns
Corrente di uscita ad alto livello:
- 15 mA
Corrente di uscita a basso livello:
12 mA
Tensione di alimentazione - Min:
4.75 V
Tensione di alimentazione - Max:
5.25 V
Temperatura di esercizio minima:
- 40 C
Temperatura massima di esercizio:
+ 85 C
Stile di montaggio:
SMD/SMT
Pacchetto/custodia:
SOIC-20
Confezione:
Tubo
Funzione:
Interfaccia bus di tipo D
Altezza:
2.35 mm
Lunghezza:
12.8 mm
Intervallo operativo di temperatura:
- 40 C to + 85 C
Serie:
CY74FCT2574T
Larghezza:
7.52 mm
Marca:
Texas Instruments
Numero di canali:
8
Numero di righe di input:
8
Numero di linee di uscita:
3
Tensione di alimentazione operativa:
4.75 V to 5.25 V
Tipologia di prodotto:
Infradito
Quantità confezione di fabbrica:
25
sottocategoria:
CI logici
Unità di peso:
0.017662 oz
Tags
CY74FCT2574ATS, CY74FCT2574A, CY74FCT2574, CY74FCT257, CY74FCT25, CY74FCT2, CY74FCT, CY74FC, CY74F, CY74, CY7
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We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
Octal D-Type egisters with 3-State Outputs and Series Damping esistors 20-SOIC -40 to 85
***p One Stop Global
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin SOIC Tube
***ark
D-TYPE FLIP FLOP, 3-STATE, SOIC-20
***i-Key
IC FF D-TYPE SNGL 8BIT 20SOIC
***nell
LOGIC, OCT D-TYP REG 3-ST, 20SOIC; No. of Pins:20; Operating Temperature Range:-40°C to +85°C; SVHC:No SVHC (18-Jun-2010); Package / Case:SOIC; Frequency:250MHz; Input Current Max:5µA; Logic IC Base Number:742574; Logic IC Family:FCT; Logic IC Function:8-Bit Register with 3-State Outputs; Supply Voltage Max:5.25V; Supply Voltage Min:4.75V; Termination Type:SMD
***ment14 APAC
LOGIC, OCT D-TYP REG 3-ST, 20SOIC; Logic Case Style:SOIC; No. of Pins:20; Supply Voltage Range:4.75V to 5.25V; Operating Temperature Range:-40°C to +85°C; SVHC:No SVHC (20-Jun-2011); Frequency:250MHz; Input Current Max:5µA; Logic Function Number:742574; Logic IC Base Number:742574; Logic IC Family:FCT; Logic IC Function:8-Bit Register with 3-State Outputs; Package / Case:SOIC; Supply Voltage Max:5.25V; Supply Voltage Min:4.75V; Termination Type:SMD
***AS INS
The CY74FCT2574T is a high-speed, low-power, octal D-type flip-flop featuring separate D-type inputs for each flip-flop. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2574T can replace the CY74FCT574T to reduce noise in an existing design. This device has 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE\) inputs are common to all flip-flops. The CY74FCT2574T is identical to the CY74FCT2374T, except that on the CY74FCT2574T all outputs are on one side of the package and all inputs are on the other side. The flip-flops in the CY74FCT2574T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE\ is low, the contents of the flip-flops are available at the outputs. When OE\ is high, the outputs are in the high-impedance state. The state of OE\ does not affect the state of the flip-flops.
***ASIN
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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Disponibilità
Azione:
490
Su ordine:
2473
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