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74ALVCH162836DLRG4

74ALVCH162836DLRG4
Mfr. #:
74ALVCH162836DLRG4
Descrizione:
Universal Bus Functions 20-Bit Univ Bus Drv With 3-State Outputs
Ciclo vitale:
Nuovo da questo produttore.
Scheda dati:
74ALVCH162836DLRG4 Scheda dati
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74ALVCH162836DLRG4 maggiori informazioni 74ALVCH162836DLRG4 Product Details
Attributo del prodotto
Valore attributo
Produttore:
Texas Instruments
Categoria di prodotto:
Funzioni bus universali
RoHS:
Y
Famiglia logica:
74AL
Numero di circuiti:
1
Tempo di ritardo di propagazione:
5.5 ns
Tensione di alimentazione - Max:
3.6 V
Tensione di alimentazione - Min:
1.65 V
Temperatura di esercizio minima:
- 40 C
Temperatura massima di esercizio:
+ 85 C
Pacchetto/custodia:
SSOP-56
Confezione:
Bobina
Funzione:
Autista di autobus universale
Altezza:
2.59 mm
Lunghezza:
18.41 mm
Tipo di uscita:
3-State
Larghezza:
7.49 mm
Marca:
Texas Instruments
Stile di montaggio:
SMD/SMT
Corrente di alimentazione - Max:
40 uA
Corrente di uscita ad alto livello:
- 12 mA
Corrente di uscita a basso livello:
12 mA
Tensione di alimentazione operativa:
1.65 V to 3.6 V
Polarità:
Non invertente
Tipologia di prodotto:
Funzioni bus universali
Quantità confezione di fabbrica:
1
sottocategoria:
CI logici
Unità di peso:
0.021164 oz
Tags
74ALVCH162836, 74ALVCH16283, 74ALVCH1628, 74ALVCH162, 74ALVCH1, 74ALVCH, 74ALVC, 74ALV, 74AL, 74A
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC UNIV BUS DVR 20BIT 56SSOP
***as Instruments
This 20-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation. Data flow from A to Y is controlled by the output-enable (OE\) input. The device operates in the transparent mode when the latch-enable (LE\) input is low. When LE\ is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE\ is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state. The output port includes equivalent 26- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH162836 is characterized for operation from –40C to 85C.
Parte # Descrizione Azione Prezzo
74ALVCH162836DLRG4
DISTI # 74ALVCH162836DLRG4-ND		IC UNIV BUS DVR 20BIT 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)		Limited Supply - Call
    74ALVCH162836DLRG4
    DISTI # 595-74ALVCH162836DLR    		Universal Bus Functions 20-Bit Univ Bus Drv With 3-State Outputs
    RoHS: Compliant    		0
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      		 Nuovo e originale
      Disponibilità
      Azione:
      Available
      Su ordine:
      4500
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