MC100E431FNG

MC100E431FNG
Mfr. #:
MC100E431FNG
Produttore:
ON Semiconductor
Descrizione:
Flip Flops 5V ECL 3-Bit Differential
Ciclo vitale:
Nuovo da questo produttore.
Scheda dati:
MC100E431FNG Scheda dati
Consegna:
DHL FedEx Ups TNT EMS
Pagamento:
T/T Paypal Visa MoneyGram Western Union
HTML Datasheet:
MC100E431FNG DatasheetMC100E431FNG Datasheet (P4-P6)MC100E431FNG Datasheet (P7-P9)
ECAD Model:
Attributo del prodotto
Valore attributo
Produttore:
ON Semiconductor
Categoria di prodotto:
Infradito
RoHS:
Y
Numero di circuiti:
3
Famiglia logica:
100
Tipo di logica:
Ciabatte infradito
Polarità:
Invertente/Non invertente
Tipo di ingresso:
Seriale / Parallelo
Tipo di uscita:
Differenziale
Tempo di ritardo di propagazione:
0.85 ns
Tensione di alimentazione - Min:
+/- 4.2 V
Tensione di alimentazione - Max:
+/- 5.7 V
Temperatura di esercizio minima:
0 C
Temperatura massima di esercizio:
+ 85 C
Stile di montaggio:
SMD/SMT
Pacchetto/custodia:
PLCC-28
Confezione:
Tubo
Funzione:
Tipo D
Altezza:
3.69 mm
Lunghezza:
11.58 mm
Larghezza:
11.58 mm
Marca:
ON Semiconductor
Numero di canali:
3
Numero di righe di input:
3
Numero di linee di uscita:
3
Tensione di alimentazione operativa:
4.2 V to 5.7 V
Tipologia di prodotto:
Infradito
Tipo di ripristino:
Imposta, ripristina
Quantità confezione di fabbrica:
37
sottocategoria:
CI logici
Unità di peso:
0.041719 oz
Tags
MC100E43, MC100E4, MC100E, MC100, MC10, MC1
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG TRPL 28PLCC
***th Star Micro
The MC10E/100E431 is a 3-bit flip-flop with differential clock data input and data output. The asynchronous Set and Reset controls are edge-triggered rather than level controlled. This allows the user to rapidly set or reset the flip-flop and then continue clocking at the next clock edge without the necessity of de-asserting the set/reset signal (as would be the case with a level controlled set/reset). The E431 is also designed with larger internal swings an approach intended to minimize the time spent crossing the threshold region and thus reduce the metastability susceptibility window. The differential input structures are clamped so that the inputs of unused registers can be left open without upsetting the bias network of the device. The clamping action will assert the Dbar and the CLKbar sides of the inputs. Because of the edge triggered flip-flop nature of the device simultaneously opening both the clock and data inputs will result in an output which reaches an unidentified but valid state. Note that the input clamps only operate when both inputs fall to 2.5 V below VCC. The 100 Series contains temperature compensation. The VBB pin an internally generated voltage supply is available to this device only. For single-ended input conditions the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used VBB should be left open.
Parte # Mfg. Descrizione Azione Prezzo
MC100E431FNG
DISTI # MC100E431FNG-ND
ON SemiconductorIC FF D-TYPE TRPL 1BIT 28PLCC
RoHS: Compliant
Min Qty: 74
Container: Tube
Limited Supply - Call
    MC100E431FNG
    DISTI # 863-MC100E431FNG
    ON SemiconductorFlip Flops 5V ECL 3-Bit Differential
    RoHS: Compliant
    0
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      Disponibilità
      Azione:
      Available
      Su ordine:
      1500
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