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MC10E451FNG

MC10E451FNG
Mfr. #:
MC10E451FNG
Produttore:
ON Semiconductor
Descrizione:
Flip Flops 5V ECL 6-Bit D w/Diff Data/Clock
Ciclo vitale:
Nuovo da questo produttore.
Scheda dati:
MC10E451FNG Scheda dati
Consegna:
DHL FedEx Ups TNT EMS
Pagamento:
T/T Paypal Visa MoneyGram Western Union
HTML Datasheet:
MC10E451FNG DatasheetMC10E451FNG Datasheet (P4-P6)MC10E451FNG Datasheet (P7-P9)
ECAD Model:
Attributo del prodotto
Valore attributo
Produttore:
ON Semiconductor
Categoria di prodotto:
Infradito
RoHS:
Y
Numero di circuiti:
2
Famiglia logica:
10
Tipo di logica:
Registro di tipo D
Polarità:
Non invertente
Tipo di ingresso:
Differenziale
Tipo di uscita:
Single-ended
Tempo di ritardo di propagazione:
1.05 ns
Tensione di alimentazione - Min:
+/- 4.2 V
Tensione di alimentazione - Max:
+/- 5.7 V
Temperatura di esercizio minima:
0 C
Temperatura massima di esercizio:
+ 85 C
Stile di montaggio:
SMD/SMT
Pacchetto/custodia:
PLCC-28
Confezione:
Tubo
Funzione:
Interfaccia bus di tipo D
Altezza:
3.69 mm
Lunghezza:
11.58 mm
Serie:
MC10E451
Larghezza:
11.58 mm
Marca:
ON Semiconductor
Numero di canali:
6
Numero di righe di input:
2
Numero di linee di uscita:
6
Tensione di alimentazione operativa:
4.2 V to 5.7 V
Tipologia di prodotto:
Infradito
Tipo di ripristino:
Ripristino totale
Quantità confezione di fabbrica:
37
sottocategoria:
CI logici
Unità di peso:
0.041719 oz
Tags
MC10E451, MC10E45, MC10E4, MC10E, MC10, MC1
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We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***roFlash
Flip Flop D-Type Bus Interface Pos-Edge/Neg-Edge 1-Element 28-Pin PLCC Rail
***emi
5.0 V ECL 6-Bit D Register Differential Data and Clock
***th Star Micro
The MC10E/100E451 contains six D-type flip-flops with single-ended outputs and differential data inputs. The common clock input is also differential. The registers are triggered by a positive transition of the positive clock (CLK) input. A HIGH on the Master Reset (MR) input resets all Q outputs to LOW. The differential input structures are clamped so that the inputs of unused registers can be left open without upsetting the bias network of the device. The clamping action will assert the Dbar and the CLKbar sides of the inputs. Because of the edge triggered flip-flop nature of the device simultaneously opening both the clock and data inputs will result in an output which reaches an unidentified but valid state. Note that the input clamps only operate when both inputs fall to 2.5 V below VCC. The VBB pin an internally generated voltage supply is available to this device only. For single-ended input conditions the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used VBB should be left open. The 100 Series contains temperature compensation.
Parte # Mfg. Descrizione Azione Prezzo
MC10E451FNG
DISTI # MC10E451FNG-ND		ON SemiconductorIC FF D-TYPE SNGL 6BIT 28PLCC
RoHS: Compliant
Min Qty: 37
Container: Tube		Limited Supply - Call
    MC10E451FNG
    DISTI # 863-MC10E451FNG    		ON SemiconductorFlip Flops 5V ECL 6-Bit D w/Diff Data/Clock
    RoHS: Compliant    		0
      MC10E451FN
      DISTI # 863-MC10E451FN      		ON SemiconductorFlip Flops 5V ECL 6-Bit D
      RoHS: Not compliant      		0
        MC10E451FNGON Semiconductor 
        RoHS: Not Compliant        		5403
        • 1000:$7.2700
        • 500:$7.6500
        • 100:$7.9600
        • 25:$8.3000
        • 1:$8.9400
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        Disponibilità
        Azione:
        Available
        Su ordine:
        3500
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